PicLA: a very low cost Logic Analyzer

New: Version 2.0 (sep 2009)


This page describes a very low cost logic analyser using an 18F2525 PIC microprocessor and a PC. The PIC is used as a hardware capture device which monitors the datalines and records all changes. The buffering, triggering, interpretation and display is handled by a PC program running under Windows. The hardware cost will vary between €15 (RS232 version) and € 30 (USB version). The analyser can operate in a "Fast Sampling" mode, in which the data is sampled into an internal 1K buffer on the PIC and in "Normal Sampling" or "Continious Sampling " mode in which all data changes are offloaded to the PC in real time and arbritary sampling buffer size is available.
A short specification


More and more chips I used in one experiments required the usage of chips which were controller using some kind of serial protocol. This varied from the AD9832 Digitital Synthesiser, reading RFID tags, the HTRC1000 HiTag read chiper chip, various digital thermometers and the whole range of I2C chips.
Although an oscilloscope was sometimes helpful the tedious job of writing small test program's to write to the chip in repeated loops to get an stable picture of what was going on a logic analyser would be far better.

Although a logic analyser is a nice instruments, for hobby purposes they are in my opinion way to expensive. Prices are starting with a few thousand Euros.
Cheaper options are the "PC-based" logic analysers which are normally connected to the USB, serial or parallel port of a PC. The PC takes care of displaying the the data and the actual sampling is done by dedicated hardware which is controlled by a microcontroller. These devices can capture data in the MegaHertz range and have a memory capacity ranging from a few K samples up to 256K samples. Some examples of these logic analysers are:

These devices will cost you a few hunderd Euros and are a good alternative.

A fews years ago I purchased a "software logic analyser", SoftLA from bgmicro. This used the PC's printer port as inputs and ran under DOS. The timing was however not very accurate and due to the various flavours of the parallel port (Standard, EPP, ECP) you could run into problems on some systems (like my laptop)

Because of earlier projects with various PIC microcontroller from MicroChip I wondered how fast I could sample the I/O lines and make my own "very low cost" logic analyser". It was easy to sample the I/O lines at a rate of 1 MHz but the memory capacity of these devices is rather limited, from a few hundred bytes up to a few kilobytes.

The next step was to use the the PIC (an 16F628) as the "sample" engine which sampled the I/O lines and send the events (change on one of the input lines) which occurred to a PC over a serial interface. Al the processing (triggering / display / protocol analysis) would be offloaded to the PC. So apart from advanced trigger options this also implies that a very large number of samples can be taken: moderm PC offer megabytes of available RAM. Some fiddling with a 20 MHz 16F628 microcontroller showed that I could sample data at 10 microsecond intervals (100 kHz sample rate) and had time left to offload the data to the PC using the serial interface. The hardware requirements are a PIC16F628 and Maxim 232 level convertor plus the additional capacitors and crystal. Less than € 10 in hardware costs.

One big problem is that it is not possible to send the events at the sample rate to the PC: the maximum rate of the serial devices is normally limited to 115kBaud which limits the number of events the serial interface can handle to about 5700 / seconds. The "average" pulse width should therefore be larger than 200 microseconds. Before the data is send to the PC it is kept in a ringbuffer on the microcontroller, so it is possible to buffer small bursts. The size of the buffer depends on the type of microcontroller used. So the resolution / sampling rate of the logic analyser is a lot better than the sustained rate of events it can handle.

Although a 10 microsecond sample interval is workable in a lot of situations it would be nice to support faster sampling rates as well. I2C has e.g. a datarate of 100kHz or 400kHz. The next version used one of the new 18F chips (the 18F252). This processor runs twice as fast, has a smarter instruction set and more memory onboard. This allowed me to increase the fastest sampling time to 2 microseconds and add an additional 4 data lines so an 8 channel logic analyser was a possible. The increased memory size was helpfull in enlarging the "Burst buffer" from 64 to 256 events. To improve the "sustained" data rate the RS-232 interface was replaced with an FDTI FT232BM chip and the transfer speed was changed to 500 kilobit/second. Although 1 Mbit is possible this caused a problem with the VCP driver on the PC side, it could not keep up with the data. The current version can handle up to 25.000 events/sec, giving an average pulse with of 40 uSec.

Finally a "FAST Sampling" mode was added. Although the available RAM on the microprocessor limits the trace duration the sampling rate can now be increased to 5 MHz (200 nanosecond sampling interval). Although triggering options are limited in this mode, it can be useful when e.g. checking an interface to an HD44780 LCD display where you want to monitor signals with sub-microsecond resolution. (Which was the reason for this addition to the logic analyser). In the slower rates only changes on the datalines are saved, enlarging the maximum capture time up to 256 fold.

September 2009 update

June 2009 update (PicLA Version 2.00, LOGAN18 version 6)

March 2009 update (PicLA Version 1.20, LOGAN18 version 5)

In the new version the following changes were made:

Still to do

The logic analyser is evolving over time as most of the functionality is implemented in software on a PC. A new feature gets added when I need it for some project.
Some planned and partially implemented features are:

Limits of the current version

Processor Channels Interface Normal rate Sustained rate Avg. interval Burst Buffer Fast Rate Fast Buffer Sample Size
PIC16F252 2 RS-232 (115k) 500 kHz 11520 evts/sec 87 usec 256 5 MHz 5120
PIC16F252 4 RS-232 (115k) 500 kHz 5760 evts/sec 173 usec 256 5 MHz 2560
PIC16F252 8 RS-232 (115k) 500 kHz 3840 evts/sec 260 usec 256 5 MHz 1280
PIC16F2525 2 RS-232 (115k) 500 kHz 11520 evts/sec 87 usec 256 5 MHz 15360
PIC16F2525 4 RS-232 (115k) 500 kHz 5760 evts/sec 173 usec 256 5 MHz 7680
PIC16F2525 8 RS-232 (115k) 500 kHz 3840 evts/sec 260 usec 256 5 MHz 3840
PIC16F2525 2 USB (500kbit) 500 kHz 50000 evts/sec 20 usec 256 5 MHz 15360
PIC16F2525 4 USB (500kbit) 500 kHz 25000 evts/sec 40 usec 256 5 MHz 7680
PIC16F2525 8 USB (500kBit) 500 kHz 15000 evts/sec 60 usec 256 5 MHz 3840