LOGAN18: Logic Analyzer based on the 18F252(5)

Overview

A very simple low-cost logic analyzer using the PIC18F252 or PIC18F2525 as capture device and a windows based PC for display.
In Normal mode the max sample rate is 2 microseconds although the sustained rate is limited to 170 microseconds/event (RS232) of 40 microseconds/event (USB).
In Fast mode the max sample rate is 200 nanoseconds, 4bit sampling is supported at 500nsec and lower rates.

Please note there are two variants: a simple version which uses a MAXIM level converter and works with 115 kBaud and an USB version which will support transfer rates of 500kbit (PIC with an 10 MHz crystal) or 1000kbit (PIC with an 12 MHz crystal).

The USB version uses an USB <-> RS232 convertor interface which I obtained from VOTI and is described on this page.
For operation with non-standard baudrates please check application note AN232-1 from FTDI or simply download the driver from this site.
In this version the INF file is modified to patch the 409600 entry to 500000 Baud and the 912600 entry to 1000000 Baud.

Click here for the RS232 schematic
Click here for the USB schematic
Click here for the PIC assembly source
Click here for a 10Mhz HEX version for an 18F252
Click here for a 10Mhz HEX version for an 18F2525

Some Pictures

Pictures of my logic analyzer project in progress:

The breadboard version with RS232 interface.

This will be the definitive version, you see the USB interface on the right.
The probes are connected via a D9 (serial) connector on the left.
A small PCB with the 18F252 will be fitted in the center.

This is my probe cable, it became very messy with loose wires.
The color coding also helped.

 

Revision History:

2009-09-19 - New schematic, new software on the web
2009-03-23 - LOGAN18 v6 - Memory compression added for FAST sampling
2009-03-23 - LOGAN18 v5 - 5usec and 10usec sampling added for FAST sampling
2009-03-23 - LOGAN18 v4.1 - New triggering, larger buffer, serial monitor code
2007-08-28 - Fixed error in RS232 schematic drawing
2005-10-16 - LOGAN18 v3.3 - 4bit FAST triggering problem fixed
2005-10-10 - Website update
2005-02-18 - LOGAN18 V2.x - Triggering in FAST mode added
2005-02-15 - LOGAN18 V2.x - "FAST Sampling" added
2004-11-19 - Corrected schematic (Version 1.1)
2004-05-02 - LOGAN18 V2.x - high & low transfer rates and hardware hanshake added
2004-04-18 - First "posted" version of the Logic Analyser (RS232 only)

PE1GRL